Lenovo 4XG7A90286 SR645 V3 AMD 9734 112C 340W 2.2GHZ

Lenovo 4XG7A90286 AMD EPYC 9734 112-Core Processor for ThinkSystem SR645 V3

Overview

The Lenovo 4XG7A90286 is a factory-configured AMD EPYC 9734 processor option for the ThinkSystem SR645 V3 server platform — a 112-core, 224-thread Genoa-family CPU running at a 2.2 GHz base clock with a 3.0 GHz boost, operating at a 340W TDP. This is Lenovo's qualification of AMD's highest core-count Genoa die for SR645 V3 deployments where thread density and memory bandwidth are the primary workload constraints: dense virtualization, large-scale AI inference serving, in-memory analytics, and high-core-count HPC workloads where per-socket throughput defines system economics.

At 112 cores per socket, the 4XG7A90286 provides a path to 224 physical cores in a dual-socket SR645 V3 configuration — relevant when software licensing is per-socket rather than per-core, or when you need to maximize VM density without adding chassis.

Key Features

• 112 Cores / 224 Threads (Socket SP5): The 9734 packs AMD's full Genoa core count into a single Socket SP5 package. In a dual-socket SR645 V3, that's 224 physical cores and 448 threads — meaningful for Kubernetes clusters where you're scheduling hundreds of containers per host, or for VDI environments where per-VM vCPU allocation drives density decisions. More threads per node means fewer nodes to manage and license.
• 2.2 GHz Base / 3.0 GHz Boost: The 800 MHz boost headroom matters for workloads that are burst-heavy but not sustained — compilation jobs, JIT-heavy application servers, and analytics queries that spike briefly before dropping back. The 2.2 GHz base is competitive for sustained multi-threaded workloads like video transcoding farms or large parallel simulation runs where all 112 cores stay busy simultaneously.
• 256 MB L3 Cache: AMD's large L3 on the Genoa architecture reduces main-memory round-trips for working sets that fit within cache. For database engines and in-memory caching tiers (Redis, Memcached, large JVM heaps), fitting more of the active dataset in L3 directly reduces latency and improves throughput per core — less time waiting on DRAM, more time executing.
• 460.8 GB/s Memory Bandwidth (Dodeca-channel DDR5): Twelve DDR5 memory channels deliver 460.8 GB/s aggregate bandwidth per socket. For AI inference workloads loading large model weights, genomics pipelines processing high-throughput sequencing data, or financial risk engines running Monte Carlo simulations, memory bandwidth is frequently the binding constraint — not core count. At 460.8 GB/s, this processor can sustain data-intensive workloads without the memory wall that limits narrower-channel designs.
• DDR5-SDRAM Memory Support: DDR5 compatibility translates to higher per-DIMM capacities and better power efficiency per bit transferred compared to DDR4 systems. For memory-dense workloads — in-memory databases, large ML model serving, or SAP HANA-class applications — DDR5 lets you populate the SR645 V3's DIMM slots with higher-density modules for greater total addressable memory per chassis.
• 340W TDP (Configurable 320W–400W): The processor ships at 340W TDP but supports a configurable range from 320W (TDP-down, for power-constrained or thermally limited rack designs) to 400W (TDP-up, for maximum sustained throughput). This flexibility lets facilities teams tune power draw to match rack PDU capacity without swapping hardware — a practical consideration when provisioning in colocation facilities with strict per-rack wattage allocations.
• No On-Board Graphics: This is a pure compute processor with no integrated GPU. Remote management of the SR645 V3 relies on the server's onboard BMC/XCC — standard for datacenter deployments where console access is handled out-of-band and no GPU output is needed at the CPU level.
• No Cooler Included: The 4XG7A90286 ships as a processor option without a bundled heatsink. The SR645 V3's thermal solution is provided by the server chassis — this is expected behavior for a server-class CPU option kit, not a gap. Verify that your SR645 V3 chassis configuration includes the appropriate heatsink for a 340W TDP processor before deploying.

Integration and Compatibility

The 4XG7A90286 is platform-specific to Lenovo's ThinkSystem SR645 V3, which uses the AMD Socket SP5 (LGA 6096) interface. This processor is not interchangeable with AMD SP3-socket platforms (EPYC 7xx2/7xx3 series) or consumer AM5 systems — socket compatibility is non-negotiable before ordering.

Within the SR645 V3 ecosystem, this CPU pairs with Lenovo's full line of ThinkSystem server components: DDR5 RDIMM/LRDIMM memory, PCIe Gen 5 expansion cards, and NVMe storage options. For high-throughput networking, the SR645 V3 supports 25GbE and 100GbE adapters that can sustain the memory bandwidth this processor delivers to attached storage and network fabric.

Organizations deploying AI inference workloads should evaluate GPU co-processor options alongside the 4XG7A90286 — the SR645 V3's PCIe Gen 5 slots can host accelerators that offload matrix math while the EPYC 9734 handles orchestration, pre/post-processing, and host I/O. Consult Lenovo's SR645 V3 rack server configuration guide for validated memory and adapter combinations.

For high-density NVR and video analytics server deployments — where a single server may ingest, decode, and analyze hundreds of simultaneous camera streams — the 9734's 112 cores and 460.8 GB/s memory bandwidth provide headroom that purpose-built appliances typically cannot match. Integrators building software-defined video management infrastructure on commodity server hardware should include this configuration in evaluation.

Frequently Asked Questions

Q: What server platform is the Lenovo 4XG7A90286 compatible with?

A: The 4XG7A90286 is a processor option specifically for the Lenovo ThinkSystem SR645 V3 server, which uses the AMD Socket SP5 (LGA 6096) interface. It is not compatible with earlier AMD EPYC SP3-socket platforms or non-Lenovo server systems.

Q: Does the 4XG7A90286 include a heatsink or cooler?

A: No. This is a processor option kit that does not include a cooler. The ThinkSystem SR645 V3 chassis provides its own thermal solution. Confirm that your SR645 V3 configuration includes a heatsink rated for the 340W TDP of the AMD EPYC 9734 before installation.

Q: What is the memory bandwidth of the AMD EPYC 9734 in this configuration?

A: The AMD EPYC 9734 supports dodeca-channel (12-channel) DDR5-SDRAM, delivering up to 460.8 GB/s of aggregate memory bandwidth per socket. In a dual-socket SR645 V3, total system memory bandwidth reaches 921.6 GB/s.

Q: Can the TDP be adjusted on the 4XG7A90286?

A: Yes. The EPYC 9734 ships at 340W TDP but supports a configurable range: TDP-down to 320W for power-constrained rack environments, or TDP-up to 400W for maximum sustained throughput. Configuration is managed through the server's BIOS/UEFI settings.

Q: How many cores and threads does the AMD EPYC 9734 provide?

A: The EPYC 9734 provides 112 physical cores and 224 threads per socket. In a dual-socket SR645 V3 configuration, that totals 224 physical cores and 448 threads system-wide.

Q: What memory type does the 4XG7A90286 support?

A: The AMD EPYC 9734 supports DDR5-SDRAM across twelve memory channels. DDR5 modules offer higher per-DIMM densities and improved power efficiency compared to DDR4, supporting large in-memory workloads when the SR645 V3 DIMM slots are fully populated.

Ted Perry

The 4XG7A90286 is one of the more purposeful CPU options in the SR645 V3 lineup — 112 cores at 340W TDP with 460.8 GB/s of DDR5 memory bandwidth is a specific answer to a specific problem: maximum thread density and memory throughput in a 2-socket, 1U or 2U chassis footprint. I reach for this configuration when a customer is building a software-defined video analytics backend or a dense virtualization host where adding more servers is either not feasible or not economical.

Technical Highlights:

• 112 Cores / 256 MB L3 Cache: The full-die Genoa configuration means the 9734 is not a binned or disabled part — you get the complete cache topology. For video analytics workloads running multiple concurrent inference engines, the 256 MB L3 keeps model weights closer to execution and reduces DDR5 fetch pressure on sustained workloads.
• Configurable TDP (320W–400W): The 80W adjustment range between TDP-down and TDP-up gives datacenter operators real flexibility. At 320W TDP-down you can fit more nodes per rack PDU circuit; at 400W TDP-up you recover additional sustained throughput for peak loads. This is a BIOS-level change, not a hardware swap.
• 460.8 GB/s Memory Bandwidth: Twelve DDR5 channels is the primary architectural advantage of Socket SP5 over previous generations. For AI inference serving large transformer models, this bandwidth is often the gating constraint — not compute. At 460.8 GB/s per socket, the 9734 can sustain model weight streaming that would saturate narrower-channel platforms.

Deployment Considerations:

• No cooler is included — this is a processor option kit for an SR645 V3 chassis that already provides server-grade thermal management. Do not order expecting a standalone retail-style heatsink in the box; validate your SR645 V3 chassis includes the correct high-TDP heatsink option for a 340W processor before the order ships.
• Socket SP5 is not backward-compatible with SP3 — if your infrastructure includes earlier EPYC 7xx2 or 7xx3 platforms, this CPU does not cross over. The SR645 V3 is a purpose-built SP5 platform and the only validated home for the 4XG7A90286.

This configuration is the right call for organizations building high-density compute nodes for software-defined security platforms — specifically, multi-server NVR backends or AI-accelerated video analytics clusters where a single SR645 V3 chassis needs to carry the processing load of what would otherwise require three or four lower-core-count nodes.